As the geometries of semiconductor devices, and particularly complementary metal oxide semiconductor (CMOS) devices, are scaled to continually shorter gate lengths, issues that were previously little or no concern are now significant. One such issue is the different dielectric constant values required for gate dielectrics for p-channel metal oxide semiconductor (PMOS) devices and n-channel metal oxide semiconductor (NMOS) devices. Specifically, PMOS and NMOS devices have different threshold voltage requirements, performance requirements, reliability requirements, etc.
It is currently believed that the amount of nitrogen in the gate dielectrics controls the dielectric constant of the PMOS and NMOS devices to a high degree, at least in the case of nitrided gate dielectrics. The amount of nitrogen in the PMOS and NMOS devices is, therefore, of paramount importance. Unfortunately, the industry presently uses a single plasma nitridation process to introduce an equal amount of nitrogen into the blanket layer of gate dielectric material, regardless of whether that location will ultimately be a PMOS device or an NMOS device. In these devices, the amount of nitrogen is neither tailored for the PMOS device nor the NMOS device, but chosen to accommodate both. Thus, what results are both PMOS devices and NMOS devices that operate at a level below what each might if it were not a CMOS set-up.
Accordingly, what is needed in the art is a CMOS device that does not experience the difficulties associated with the prior art devices and methods.